IEEE MWSCAS 2010 -  Program at a Glance

Sunday, August 1, 2010

9:00-18:00         Registration

10:00 -17:00      Tutorials <link to tutorial page>  (Room)

      T1. Digital-to-Frequency Converter: The New Engine for Future Chips   (Olympic)

      T2. Operational Amplifiers: Theory, Design and Applications   (St. Helen)

      T3. Introduction to Asynchronous Circuits and NULL Convention Logic   (Adams)

      T4. Power-Aware Testing and Test Strategies for Low-Power Devices   (Baker)

 

Monday, August 2, 2010

7:30- 17:00        Registration

8:30-8:45           Welcome to MWSCAS 2010                   (Cascade 2)

8:45-10:00         Keynote Address

                         FinFETs: Novel Design Opportunities, Prof. Niraj K. Jha

10:00-10:15       Break

            (Sessions detailed information is provided at  MWSCAS2010-epapers website)

10:15-11:55       Technical Sessions                                      Room

      Student Paper Contest                                                   Cascade 1A

      Emerging Nano-Circuits and Systems                              Cascade 1B

      Analog A/D Converters 1                                                Cascade 1C

      Embedded Electronics                                                   Adams

      Computer Arithmetic and Clock Circuits                           Olympic

      MEMS and Bioengineering  (Poster)                                 Cascade Foyer South

12:00-13:00 Break

13:40-15:20 Technical Sessions                                            Room

      Student Paper Contest                                                   Cascade 1A

      Biomedical & Bio-Inspired Engineering Syst. I                  Cascade 1B

      Clock Circuits I                                                              Cascade 1C

      Deep Submicron Design and Automation                         Adams

      Memory Design & Techniques for Managing                     Olympic

            Process Parameter Variations                                   

      Converters, Sensors and Modeling  (Poster)                     Cascade Foyer South

      Communications and Wireless (Poster)                           Cascade Foyer North

15:20-15:35  Break

15:35-17:15 Technical Sessions                                            Room         

      RF, Microwave and Optical Systems I                              Cascade 1A

      Biomedical & Bio-Inspired Engineering Syst. II                 Cascade 1B

      Amplifiers I                                                                    Cascade 1C

      Low-power Design and Design Automation                        Adams

      Algorithms & Hardware Techniques for High                     Olympic

             Performance Digital Circuits/systems                      

      Image Processing and Multimedia Systems III  (Poster)    Cascade Foyer South

      Nonlinear Systems and Neural Networks (Poster)             Cascade Foyer North

 

Tuesday August 3, 2010

8:30-10:00   Plenary Session  (Cascade 2)

            Honoring Dr. M. N. S. Swamy and His Profound Contributions on His 75th Birthday

 

10:00-10:15  Break

10:15-11:55 Technical Sessions                                            Room

      RF, Microwave and Optical Systems II                             Cascade 1A

      RF Built-in-Self-Test (RF-BiST) & RF Built-in-Self-

         Calibration (RF-BiSC) Techniques                                Cascade 1B

      Analog A/D Converters II                                                Cascade 1C

      Image Processing and Multimedia Systems I                   Adams

      Arithmetic Circuits                                                         Olympic

      Bioengineering Circuits and Systems                               Baker

      Programmable Logic, VLSI, CAD & Layout (Poster)          Cascade Foyer South

      Nanoelectronics and Nanotechnology (Poster)                  Cascade Foyer North

12:00-13:00 Break

13:40-15:20 Technical Sessions                                            Room

      Clock Circuits II                                                             Cascade 1A

      Frequency Compensation for Multi-stage

      Amplifiers & Low-Dropout Voltage Regulators                   Cascade 1B

      Amplifiers II                                                                   Cascade 1C

      Image Processing and Multimedia Systems II                   Adams

      Low Power Digital Circuits/systems                                  Olympic

      Communication and Wireless Systems I                          Baker

      Computational, Converters and Clock Analog Circuits (Poster) Cascade Foyer South

      RF, Microwave and Optics (Poster)                                  Cascade Foyer North

15:20-15:35  Break

15:35-17:15 Technical Sessions                                            Room

      Clocks and Sensors                                                      Cascade 1A

      Future Wireless Systems -A Multidisciplinary Approach    Cascade 1B

      Filters and Amplifiers                                                     Cascade 1C

      System Architectures                                                     Adams

      Emerging Devices, Digital Filters and Memories                Olympic

      Communication and Wireless Systems II                         Baker

      Amplifiers and Filters (Poster)                                         Cascade Foyer South

      Control Systems, Robotics & Power Electronics (Poster)   Cascade Foyer North

19:00    MWSCAS Banquet  (Grand Ballroom)

Student Paper Contest Awards, Myril B. Reed Award for best paper at MWSCAS 2009, Invitation to MSCAS 2011. Live music.

 

Wednesday, August 4, 2010

8:20-10:00 Technical Sessions                                              Room

      Analog Circuits Design and Analysis II                             Cascade 1A

      Energy Efficient Embedded Systems                               Cascade 1B

      Analog Computational Circuits I                                      Cascade 1C

      Linear and Nonlinear Circuits and Systems                       Adams

      Nanoelectronics and Innovative Technologies                   Olympic

      Digital and Computer Arithmetic (Poster)                          Cascade Foyer South

10:00-10:15  Break

10:15-11:55 Technical Sessions                                            Room

      Analog Circuits Design and Analysis                                Cascade 1A

      Control Systems and Power Electronics                           Cascade 1B

      Analog Computational Circuits II                                     Cascade 1C

      MEMS/NEMS                                                                Adams

      Neural Networks & Fuzzy Systems                                 Olympic

 

 

Papers in each session are listed in MWSCAS2010-epapers website.

 

 

 

Back to MWSCAS 2010 page

53rd IEEE International Midwest Symposium on Circuits and Systems